ds3231: Add adapted classes from esp8266-clock

main/CMakeLists.txt

@@ -1,2 +1,2 @@
-idf_component_register(SRCS "esp32_alarm_clock_main.c" "wifi.c" "storage.c" "api.c"
+idf_component_register(SRCS "esp32_alarm_clock_main.c" "wifi.c" "storage.c" "api.c" "ds3231.c" "bcd.c"
                     INCLUDE_DIRS "")

main/ds3231.c

@@ -0,0 +1,187 @@
+/*
+ * SPDX-FileCopyrightText: 2022 Helmut Pozimski <helmut@pozimski.eu>
+ *
+ * SPDX-License-Identifier: GPL-2.0-only
+ */
+
+#include <driver/i2c.h>
+#include <esp_err.h>
+#include <time.h>
+
+#include "bcd.h"
+
+#define DS3231_ADDRESS 0x68
+#define CLOCK_SECONDS_REGISTER_ADDRESS 0x00
+#define CLOCK_MINUTES_REGISTER_ADDRESS 0x01
+#define CLOCK_HOURS_REGISTER_ADDRESS 0x02
+#define CLOCK_DOW_REGISTER_ADDRESS 0x03
+#define CLOCK_DAY_REGISTER_ADDRESS 0x04
+#define CLOCK_MONTH_REGISTER_ADDRESS 0x05
+#define CLOCK_YEAR_REGISTER_ADDRESS 0x06
+#define ALRM1_SECONDS_REGISTER_ADDRESS 0x07
+#define ALRM1_MINUTES_REGISTER_ADDRESS 0x08
+#define ALRM1_HOURS_REGISTER_ADDRESS 0x09
+#define ALRM1_DAY_DATE_REGISTER_ADDRESS 0x0A
+#define CONTROL_REGISTER 0x0E
+#define STATUS_REGISTER 0x0F
+
+
+esp_err_t ds3231_init(int sda_pin, int scl_pin) {
+    int i2c_master_port = I2C_NUM_0;
+    i2c_config_t conf;
+    conf.mode = I2C_MODE_MASTER;
+    conf.sda_io_num = sda_pin;
+    conf.sda_pullup_en = 1;
+    conf.scl_io_num = scl_pin;
+    conf.scl_pullup_en = 1;
+    conf.clk_flags = 0;
+    conf.master.clk_speed = 100000;
+    ESP_ERROR_CHECK(i2c_driver_install(i2c_master_port, conf.mode, 0, 0, 0));
+    ESP_ERROR_CHECK(i2c_param_config(i2c_master_port, &conf));
+    return ESP_OK;
+}
+
+static esp_err_t read_value(uint8_t register_addr, uint8_t *value_read) {
+    esp_err_t ret;
+    i2c_cmd_handle_t cmd = i2c_cmd_link_create();
+    i2c_master_start(cmd);
+    i2c_master_write_byte(cmd, DS3231_ADDRESS << 1 | I2C_MASTER_WRITE, 0x01);
+    i2c_master_write_byte(cmd, register_addr, 0x01);
+    i2c_master_stop(cmd);
+    ret = i2c_master_cmd_begin(I2C_NUM_0, cmd, 1000 / portTICK_PERIOD_MS);
+    i2c_cmd_link_delete(cmd);
+
+    if (ret != ESP_OK) {
+        return ret;
+    }
+
+    cmd = i2c_cmd_link_create();
+    i2c_master_start(cmd);
+    i2c_master_write_byte(cmd, 0x68 << 1 | I2C_MASTER_READ, 0x01);
+    i2c_master_read(cmd, value_read, 1, 0x02);
+    i2c_master_stop(cmd);
+    i2c_master_cmd_begin(I2C_NUM_0, cmd, 1000 / portTICK_PERIOD_MS);
+    i2c_cmd_link_delete(cmd);
+
+    return ret;
+
+}
+
+static esp_err_t write_value(uint8_t register_addr, uint8_t write_value) {
+    esp_err_t ret;
+    i2c_cmd_handle_t cmd = i2c_cmd_link_create();
+    i2c_master_start(cmd);
+    i2c_master_write_byte(cmd, DS3231_ADDRESS << 1 | I2C_MASTER_WRITE, 0x01);
+    i2c_master_write_byte(cmd, register_addr, 0x01);
+    i2c_master_write_byte(cmd, write_value, 0x01);
+    i2c_master_stop(cmd);
+    ret = i2c_master_cmd_begin(I2C_NUM_0, cmd, 1000 / portTICK_PERIOD_MS);
+    i2c_cmd_link_delete(cmd);
+
+    return ret;
+
+}
+
+static uint8_t convert_12h_to_24h(uint8_t value_read) {
+    uint8_t cleaned_value = value_read & 0xBF;
+    if (value_read & 0x10) {
+        cleaned_value = cleaned_value & 0XDF;
+        return bcd_first_digit_value_bin(cleaned_value)
+               + 12 + bcd_last_digit_value_bin(cleaned_value);
+    }
+    return bcd_first_digit_value_bin(cleaned_value)
+           + bcd_last_digit_value_bin(cleaned_value);
+}
+
+static esp_err_t read_hour_value(uint8_t *hour_value) {
+    uint8_t value_read;
+    esp_err_t ret = read_value(CLOCK_HOURS_REGISTER_ADDRESS, &value_read);
+
+    if (ret != ESP_OK) {
+        return ret;
+    }
+
+    if (value_read & 0x20) {
+        *hour_value = convert_12h_to_24h(value_read);
+    } else {
+        *hour_value = bcd2bin(value_read);
+    }
+
+    return ret;
+}
+
+static esp_err_t read_month_value(uint8_t *month_value) {
+    uint8_t value_read;
+    esp_err_t ret = read_value(CLOCK_MONTH_REGISTER_ADDRESS, &value_read);
+    if (ret == ESP_OK) {
+        *month_value = bcd2bin(value_read & 0x7F);
+    }
+    return ret;
+}
+
+esp_err_t ds3231_read_date_time(struct tm *date_time) {
+    esp_err_t ret;
+    uint8_t seconds, minutes, hours, dow, day, month, year;
+    ret = read_value(CLOCK_SECONDS_REGISTER_ADDRESS, &seconds);
+    ret |= read_value(CLOCK_MINUTES_REGISTER_ADDRESS, &minutes);
+    ret |= read_hour_value(&hours);
+    ret |= read_value(CLOCK_DOW_REGISTER_ADDRESS, &dow);
+    ret |= read_value(CLOCK_DAY_REGISTER_ADDRESS, &day);
+    ret |= read_month_value(&month);
+    ret |= read_value(CLOCK_YEAR_REGISTER_ADDRESS, &year);
+
+    date_time->tm_sec = bcd2bin(seconds);
+    date_time->tm_min = bcd2bin(minutes);
+    date_time->tm_hour = hours;
+    date_time->tm_wday = bcd2bin(dow);
+    date_time->tm_mday = bcd2bin(day);
+    date_time->tm_mon = month;
+    date_time->tm_year = bcd2bin(year);
+
+    return ret;
+
+}
+
+esp_err_t ds3231_write_date_time(struct tm date_time) {
+    esp_err_t ret;
+    ret = write_value(CLOCK_SECONDS_REGISTER_ADDRESS, bin2bcd(date_time.tm_sec));
+    ret |= write_value(CLOCK_MINUTES_REGISTER_ADDRESS, bin2bcd(date_time.tm_min));
+    ret |= write_value(CLOCK_HOURS_REGISTER_ADDRESS, bin2bcd(date_time.tm_hour));
+    ret |= write_value(CLOCK_DOW_REGISTER_ADDRESS, bin2bcd(date_time.tm_wday));
+    ret |= write_value(CLOCK_DAY_REGISTER_ADDRESS, bin2bcd(date_time.tm_mday));
+    ret |= write_value(CLOCK_MONTH_REGISTER_ADDRESS, bin2bcd(date_time.tm_mon) | 0x80);
+    ret |= write_value(CLOCK_YEAR_REGISTER_ADDRESS, bin2bcd(date_time.tm_year));
+
+    return ret;
+}
+
+esp_err_t ds3231_set_alrm1(struct tm date_time, uint16_t mode) {
+    esp_err_t ret;
+    ret = write_value(ALRM1_SECONDS_REGISTER_ADDRESS, bin2bcd(date_time.tm_sec) | ((mode & 0x01) << 7));
+    ret |= write_value(ALRM1_MINUTES_REGISTER_ADDRESS, bin2bcd(date_time.tm_min) | ((mode & 0x02) << 6));
+    ret |= write_value(ALRM1_HOURS_REGISTER_ADDRESS, bin2bcd(date_time.tm_hour) | ((mode & 0x04) << 5));
+    ret |= write_value(ALRM1_DAY_DATE_REGISTER_ADDRESS, bin2bcd(date_time.tm_mday) | ((mode & 0x08) << 4));
+    return ret;
+}
+
+esp_err_t ds3231_enable_arlm1_interrupt() {
+    return write_value(CONTROL_REGISTER, 0x1D);
+}
+
+esp_err_t ds3231_acknowledge_alrm1() {
+    esp_err_t ret;
+    uint8_t register_value;
+    ret = read_value(STATUS_REGISTER, &register_value);
+    register_value ^= 0x01;
+    ret |= write_value(STATUS_REGISTER, register_value);
+    return ret;
+}
+
+esp_err_t ds3231_disable_32khz_output() {
+    esp_err_t ret;
+    uint8_t register_value;
+    ret = read_value(STATUS_REGISTER, &register_value);
+    register_value ^= 0x08;
+    ret |= write_value(STATUS_REGISTER, register_value);
+    return ret;
+}

main/ds3231.h

@@ -0,0 +1,25 @@
+#include "esp_err.h"
+#include <time.h>
+
+enum alrm1_mode {
+    each_second = 0x0F,
+    seconds_match = 0x0E,
+    minutes_seconds_match = 0x0C,
+    hours_minutes_seconds_match = 0x08,
+    all_match = 0x00,
+    day_time_match = 0x10
+};
+
+esp_err_t ds3231_init(int sda_pin, int scl_pin);
+
+esp_err_t ds3231_read_date_time(struct tm *date_time);
+
+esp_err_t ds3231_write_date_time(struct tm date_time);
+
+esp_err_t ds3231_set_alrm1(struct tm date_time, uint16_t mode);
+
+esp_err_t ds3231_enable_arlm1_interrupt(void);
+
+esp_err_t ds3231_acknowledge_alrm1(void);
+
+esp_err_t ds3231_disable_32khz_output(void);