ds3231.c 6.0 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2022 Helmut Pozimski <helmut@pozimski.eu>
  3. *
  4. * SPDX-License-Identifier: GPL-2.0-only
  5. */
  6. #include <driver/i2c.h>
  7. #include <esp_err.h>
  8. #include <time.h>
  9. #include "bcd.h"
  10. #define DS3231_ADDRESS 0x68
  11. #define CLOCK_SECONDS_REGISTER_ADDRESS 0x00
  12. #define CLOCK_MINUTES_REGISTER_ADDRESS 0x01
  13. #define CLOCK_HOURS_REGISTER_ADDRESS 0x02
  14. #define CLOCK_DOW_REGISTER_ADDRESS 0x03
  15. #define CLOCK_DAY_REGISTER_ADDRESS 0x04
  16. #define CLOCK_MONTH_REGISTER_ADDRESS 0x05
  17. #define CLOCK_YEAR_REGISTER_ADDRESS 0x06
  18. #define ALRM1_SECONDS_REGISTER_ADDRESS 0x07
  19. #define ALRM1_MINUTES_REGISTER_ADDRESS 0x08
  20. #define ALRM1_HOURS_REGISTER_ADDRESS 0x09
  21. #define ALRM1_DAY_DATE_REGISTER_ADDRESS 0x0A
  22. #define CONTROL_REGISTER 0x0E
  23. #define STATUS_REGISTER 0x0F
  24. esp_err_t ds3231_init(int sda_pin, int scl_pin) {
  25. int i2c_master_port = I2C_NUM_0;
  26. i2c_config_t conf;
  27. conf.mode = I2C_MODE_MASTER;
  28. conf.sda_io_num = sda_pin;
  29. conf.sda_pullup_en = 1;
  30. conf.scl_io_num = scl_pin;
  31. conf.scl_pullup_en = 1;
  32. conf.clk_flags = 0;
  33. conf.master.clk_speed = 100000;
  34. ESP_ERROR_CHECK(i2c_driver_install(i2c_master_port, conf.mode, 0, 0, 0));
  35. ESP_ERROR_CHECK(i2c_param_config(i2c_master_port, &conf));
  36. return ESP_OK;
  37. }
  38. static esp_err_t read_value(uint8_t register_addr, uint8_t *value_read) {
  39. esp_err_t ret;
  40. i2c_cmd_handle_t cmd = i2c_cmd_link_create();
  41. i2c_master_start(cmd);
  42. i2c_master_write_byte(cmd, DS3231_ADDRESS << 1 | I2C_MASTER_WRITE, 0x01);
  43. i2c_master_write_byte(cmd, register_addr, 0x01);
  44. i2c_master_stop(cmd);
  45. ret = i2c_master_cmd_begin(I2C_NUM_0, cmd, 1000 / portTICK_PERIOD_MS);
  46. i2c_cmd_link_delete(cmd);
  47. if (ret != ESP_OK) {
  48. return ret;
  49. }
  50. cmd = i2c_cmd_link_create();
  51. i2c_master_start(cmd);
  52. i2c_master_write_byte(cmd, 0x68 << 1 | I2C_MASTER_READ, 0x01);
  53. i2c_master_read(cmd, value_read, 1, 0x02);
  54. i2c_master_stop(cmd);
  55. i2c_master_cmd_begin(I2C_NUM_0, cmd, 1000 / portTICK_PERIOD_MS);
  56. i2c_cmd_link_delete(cmd);
  57. return ret;
  58. }
  59. static esp_err_t write_value(uint8_t register_addr, uint8_t write_value) {
  60. esp_err_t ret;
  61. i2c_cmd_handle_t cmd = i2c_cmd_link_create();
  62. i2c_master_start(cmd);
  63. i2c_master_write_byte(cmd, DS3231_ADDRESS << 1 | I2C_MASTER_WRITE, 0x01);
  64. i2c_master_write_byte(cmd, register_addr, 0x01);
  65. i2c_master_write_byte(cmd, write_value, 0x01);
  66. i2c_master_stop(cmd);
  67. ret = i2c_master_cmd_begin(I2C_NUM_0, cmd, 1000 / portTICK_PERIOD_MS);
  68. i2c_cmd_link_delete(cmd);
  69. return ret;
  70. }
  71. static uint8_t convert_12h_to_24h(uint8_t value_read) {
  72. uint8_t cleaned_value = value_read & 0xBF;
  73. if (value_read & 0x10) {
  74. cleaned_value = cleaned_value & 0XDF;
  75. return bcd_first_digit_value_bin(cleaned_value)
  76. + 12 + bcd_last_digit_value_bin(cleaned_value);
  77. }
  78. return bcd_first_digit_value_bin(cleaned_value)
  79. + bcd_last_digit_value_bin(cleaned_value);
  80. }
  81. static esp_err_t read_hour_value(uint8_t *hour_value) {
  82. uint8_t value_read;
  83. esp_err_t ret = read_value(CLOCK_HOURS_REGISTER_ADDRESS, &value_read);
  84. if (ret != ESP_OK) {
  85. return ret;
  86. }
  87. if (value_read & 0x20) {
  88. *hour_value = convert_12h_to_24h(value_read);
  89. } else {
  90. *hour_value = bcd2bin(value_read);
  91. }
  92. return ret;
  93. }
  94. static esp_err_t read_month_value(uint8_t *month_value) {
  95. uint8_t value_read;
  96. esp_err_t ret = read_value(CLOCK_MONTH_REGISTER_ADDRESS, &value_read);
  97. if (ret == ESP_OK) {
  98. *month_value = bcd2bin(value_read & 0x7F);
  99. }
  100. return ret;
  101. }
  102. esp_err_t ds3231_read_date_time(struct tm *date_time) {
  103. esp_err_t ret;
  104. uint8_t seconds, minutes, hours, dow, day, month, year;
  105. ret = read_value(CLOCK_SECONDS_REGISTER_ADDRESS, &seconds);
  106. ret |= read_value(CLOCK_MINUTES_REGISTER_ADDRESS, &minutes);
  107. ret |= read_hour_value(&hours);
  108. ret |= read_value(CLOCK_DOW_REGISTER_ADDRESS, &dow);
  109. ret |= read_value(CLOCK_DAY_REGISTER_ADDRESS, &day);
  110. ret |= read_month_value(&month);
  111. ret |= read_value(CLOCK_YEAR_REGISTER_ADDRESS, &year);
  112. date_time->tm_sec = bcd2bin(seconds);
  113. date_time->tm_min = bcd2bin(minutes);
  114. date_time->tm_hour = hours;
  115. date_time->tm_wday = bcd2bin(dow);
  116. date_time->tm_mday = bcd2bin(day);
  117. date_time->tm_mon = month;
  118. date_time->tm_year = bcd2bin(year);
  119. return ret;
  120. }
  121. esp_err_t ds3231_write_date_time(struct tm date_time) {
  122. esp_err_t ret;
  123. ret = write_value(CLOCK_SECONDS_REGISTER_ADDRESS, bin2bcd(date_time.tm_sec));
  124. ret |= write_value(CLOCK_MINUTES_REGISTER_ADDRESS, bin2bcd(date_time.tm_min));
  125. ret |= write_value(CLOCK_HOURS_REGISTER_ADDRESS, bin2bcd(date_time.tm_hour));
  126. ret |= write_value(CLOCK_DOW_REGISTER_ADDRESS, bin2bcd(date_time.tm_wday));
  127. ret |= write_value(CLOCK_DAY_REGISTER_ADDRESS, bin2bcd(date_time.tm_mday));
  128. ret |= write_value(CLOCK_MONTH_REGISTER_ADDRESS, bin2bcd(date_time.tm_mon) | 0x80);
  129. ret |= write_value(CLOCK_YEAR_REGISTER_ADDRESS, bin2bcd(date_time.tm_year));
  130. return ret;
  131. }
  132. esp_err_t ds3231_set_alrm1(struct tm date_time, uint16_t mode) {
  133. esp_err_t ret;
  134. ret = write_value(ALRM1_SECONDS_REGISTER_ADDRESS, bin2bcd(date_time.tm_sec) | ((mode & 0x01) << 7));
  135. ret |= write_value(ALRM1_MINUTES_REGISTER_ADDRESS, bin2bcd(date_time.tm_min) | ((mode & 0x02) << 6));
  136. ret |= write_value(ALRM1_HOURS_REGISTER_ADDRESS, bin2bcd(date_time.tm_hour) | ((mode & 0x04) << 5));
  137. ret |= write_value(ALRM1_DAY_DATE_REGISTER_ADDRESS, bin2bcd(date_time.tm_mday) | ((mode & 0x08) << 4));
  138. return ret;
  139. }
  140. esp_err_t ds3231_enable_arlm1_interrupt() {
  141. return write_value(CONTROL_REGISTER, 0x1D);
  142. }
  143. esp_err_t ds3231_acknowledge_alrm1() {
  144. esp_err_t ret;
  145. uint8_t register_value;
  146. ret = read_value(STATUS_REGISTER, &register_value);
  147. register_value ^= 0x01;
  148. ret |= write_value(STATUS_REGISTER, register_value);
  149. return ret;
  150. }
  151. esp_err_t ds3231_disable_32khz_output() {
  152. esp_err_t ret;
  153. uint8_t register_value;
  154. ret = read_value(STATUS_REGISTER, &register_value);
  155. register_value ^= 0x08;
  156. ret |= write_value(STATUS_REGISTER, register_value);
  157. return ret;
  158. }