ds3231.c 6.3 KB

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  1. /*
  2. * SPDX-FileCopyrightText: 2022 Helmut Pozimski <helmut@pozimski.eu>
  3. *
  4. * SPDX-License-Identifier: GPL-2.0-only
  5. */
  6. #include <driver/i2c.h>
  7. #include <esp_err.h>
  8. #include <time.h>
  9. #include "bcd.h"
  10. #define DS3231_ADDRESS 0x68
  11. #define CLOCK_SECONDS_REGISTER_ADDRESS 0x00
  12. #define CLOCK_MINUTES_REGISTER_ADDRESS 0x01
  13. #define CLOCK_HOURS_REGISTER_ADDRESS 0x02
  14. #define CLOCK_DOW_REGISTER_ADDRESS 0x03
  15. #define CLOCK_DAY_REGISTER_ADDRESS 0x04
  16. #define CLOCK_MONTH_REGISTER_ADDRESS 0x05
  17. #define CLOCK_YEAR_REGISTER_ADDRESS 0x06
  18. #define ALRM1_SECONDS_REGISTER_ADDRESS 0x07
  19. #define ALRM1_MINUTES_REGISTER_ADDRESS 0x08
  20. #define ALRM1_HOURS_REGISTER_ADDRESS 0x09
  21. #define ALRM1_DAY_DATE_REGISTER_ADDRESS 0x0A
  22. #define CONTROL_REGISTER 0x0E
  23. #define STATUS_REGISTER 0x0F
  24. static SemaphoreHandle_t mutex = NULL;
  25. esp_err_t ds3231_init(int sda_pin, int scl_pin) {
  26. if (mutex == NULL) {
  27. mutex = xSemaphoreCreateMutex();
  28. }
  29. int i2c_master_port = I2C_NUM_0;
  30. i2c_config_t conf;
  31. conf.mode = I2C_MODE_MASTER;
  32. conf.sda_io_num = sda_pin;
  33. conf.sda_pullup_en = 1;
  34. conf.scl_io_num = scl_pin;
  35. conf.scl_pullup_en = 1;
  36. conf.clk_flags = 0;
  37. conf.master.clk_speed = 100000;
  38. ESP_ERROR_CHECK(i2c_driver_install(i2c_master_port, conf.mode, 0, 0, 0));
  39. ESP_ERROR_CHECK(i2c_param_config(i2c_master_port, &conf));
  40. return ESP_OK;
  41. }
  42. static esp_err_t read_value(uint8_t register_addr, uint8_t *value_read) {
  43. esp_err_t ret;
  44. xSemaphoreTake(mutex, portMAX_DELAY);
  45. i2c_cmd_handle_t cmd = i2c_cmd_link_create();
  46. i2c_master_start(cmd);
  47. i2c_master_write_byte(cmd, DS3231_ADDRESS << 1 | I2C_MASTER_WRITE, 0x01);
  48. i2c_master_write_byte(cmd, register_addr, 0x01);
  49. i2c_master_stop(cmd);
  50. ret = i2c_master_cmd_begin(I2C_NUM_0, cmd, 1000 / portTICK_PERIOD_MS);
  51. i2c_cmd_link_delete(cmd);
  52. if (ret != ESP_OK) {
  53. return ret;
  54. }
  55. cmd = i2c_cmd_link_create();
  56. i2c_master_start(cmd);
  57. i2c_master_write_byte(cmd, 0x68 << 1 | I2C_MASTER_READ, 0x01);
  58. i2c_master_read(cmd, value_read, 1, 0x02);
  59. i2c_master_stop(cmd);
  60. i2c_master_cmd_begin(I2C_NUM_0, cmd, 1000 / portTICK_PERIOD_MS);
  61. i2c_cmd_link_delete(cmd);
  62. xSemaphoreGive(mutex);
  63. return ret;
  64. }
  65. static esp_err_t write_value(uint8_t register_addr, uint8_t write_value) {
  66. esp_err_t ret;
  67. xSemaphoreTake(mutex, portMAX_DELAY);
  68. i2c_cmd_handle_t cmd = i2c_cmd_link_create();
  69. i2c_master_start(cmd);
  70. i2c_master_write_byte(cmd, DS3231_ADDRESS << 1 | I2C_MASTER_WRITE, 0x01);
  71. i2c_master_write_byte(cmd, register_addr, 0x01);
  72. i2c_master_write_byte(cmd, write_value, 0x01);
  73. i2c_master_stop(cmd);
  74. ret = i2c_master_cmd_begin(I2C_NUM_0, cmd, 1000 / portTICK_PERIOD_MS);
  75. i2c_cmd_link_delete(cmd);
  76. xSemaphoreGive(mutex);
  77. return ret;
  78. }
  79. static uint8_t convert_12h_to_24h(uint8_t value_read) {
  80. uint8_t cleaned_value = value_read & 0xBF;
  81. if (value_read & 0x10) {
  82. cleaned_value = cleaned_value & 0XDF;
  83. return bcd_first_digit_value_bin(cleaned_value)
  84. + 12 + bcd_last_digit_value_bin(cleaned_value);
  85. }
  86. return bcd_first_digit_value_bin(cleaned_value)
  87. + bcd_last_digit_value_bin(cleaned_value);
  88. }
  89. static esp_err_t read_hour_value(uint8_t *hour_value) {
  90. uint8_t value_read;
  91. esp_err_t ret = read_value(CLOCK_HOURS_REGISTER_ADDRESS, &value_read);
  92. if (ret != ESP_OK) {
  93. return ret;
  94. }
  95. if (value_read & 0x20) {
  96. *hour_value = convert_12h_to_24h(value_read);
  97. } else {
  98. *hour_value = bcd2bin(value_read);
  99. }
  100. return ret;
  101. }
  102. static esp_err_t read_month_value(uint8_t *month_value) {
  103. uint8_t value_read;
  104. esp_err_t ret = read_value(CLOCK_MONTH_REGISTER_ADDRESS, &value_read);
  105. if (ret == ESP_OK) {
  106. *month_value = bcd2bin(value_read & 0x7F);
  107. }
  108. return ret;
  109. }
  110. esp_err_t ds3231_read_date_time(struct tm *date_time) {
  111. esp_err_t ret;
  112. uint8_t seconds, minutes, hours, dow, day, month, year;
  113. ret = read_value(CLOCK_SECONDS_REGISTER_ADDRESS, &seconds);
  114. ret |= read_value(CLOCK_MINUTES_REGISTER_ADDRESS, &minutes);
  115. ret |= read_hour_value(&hours);
  116. ret |= read_value(CLOCK_DOW_REGISTER_ADDRESS, &dow);
  117. ret |= read_value(CLOCK_DAY_REGISTER_ADDRESS, &day);
  118. ret |= read_month_value(&month);
  119. ret |= read_value(CLOCK_YEAR_REGISTER_ADDRESS, &year);
  120. date_time->tm_sec = bcd2bin(seconds);
  121. date_time->tm_min = bcd2bin(minutes);
  122. date_time->tm_hour = hours;
  123. date_time->tm_wday = bcd2bin(dow);
  124. date_time->tm_mday = bcd2bin(day);
  125. date_time->tm_mon = month;
  126. date_time->tm_year = bcd2bin(year);
  127. return ret;
  128. }
  129. esp_err_t ds3231_write_date_time(struct tm date_time) {
  130. esp_err_t ret;
  131. ret = write_value(CLOCK_SECONDS_REGISTER_ADDRESS, bin2bcd(date_time.tm_sec));
  132. ret |= write_value(CLOCK_MINUTES_REGISTER_ADDRESS, bin2bcd(date_time.tm_min));
  133. ret |= write_value(CLOCK_HOURS_REGISTER_ADDRESS, bin2bcd(date_time.tm_hour));
  134. ret |= write_value(CLOCK_DOW_REGISTER_ADDRESS, bin2bcd(date_time.tm_wday));
  135. ret |= write_value(CLOCK_DAY_REGISTER_ADDRESS, bin2bcd(date_time.tm_mday));
  136. ret |= write_value(CLOCK_MONTH_REGISTER_ADDRESS, bin2bcd(date_time.tm_mon) | 0x80);
  137. ret |= write_value(CLOCK_YEAR_REGISTER_ADDRESS, bin2bcd(date_time.tm_year));
  138. return ret;
  139. }
  140. esp_err_t ds3231_set_alrm1(struct tm date_time, uint16_t mode) {
  141. esp_err_t ret;
  142. ret = write_value(ALRM1_SECONDS_REGISTER_ADDRESS, bin2bcd(date_time.tm_sec) | ((mode & 0x01) << 7));
  143. ret |= write_value(ALRM1_MINUTES_REGISTER_ADDRESS, bin2bcd(date_time.tm_min) | ((mode & 0x02) << 6));
  144. ret |= write_value(ALRM1_HOURS_REGISTER_ADDRESS, bin2bcd(date_time.tm_hour) | ((mode & 0x04) << 5));
  145. ret |= write_value(ALRM1_DAY_DATE_REGISTER_ADDRESS, bin2bcd(date_time.tm_mday) | ((mode & 0x08) << 4));
  146. return ret;
  147. }
  148. esp_err_t ds3231_enable_arlm1_interrupt() {
  149. return write_value(CONTROL_REGISTER, 0x1D);
  150. }
  151. esp_err_t ds3231_acknowledge_alrm1() {
  152. esp_err_t ret;
  153. uint8_t register_value;
  154. ret = read_value(STATUS_REGISTER, &register_value);
  155. register_value ^= 0x01;
  156. ret |= write_value(STATUS_REGISTER, register_value);
  157. return ret;
  158. }
  159. esp_err_t ds3231_disable_32khz_output() {
  160. esp_err_t ret;
  161. uint8_t register_value;
  162. ret = read_value(STATUS_REGISTER, &register_value);
  163. register_value ^= 0x08;
  164. ret |= write_value(STATUS_REGISTER, register_value);
  165. return ret;
  166. }